The present invention relates generally to integrated circuits, and more particularly to a digital delay circuit capable of being implemented in an integrated circuit.
Delay lines are commonly used in a wide variety of electronic circuits, such as tuning circuits, that are sensitive to specific delays. The function of a delay line in these circuits is to delay an input digital signal by a specific predetermined amount of time. For example, hard disc data separators typically employ delay lines composed of precision LC networks and buffers to produce delays of 30 ns, 40 ns, and 50 ns.
The major drawback of the presently available digital delay lines is their requirement for precision components and inductors, which are relatively expensive and subject to variations in temperature and voltage. Moreover, it is not practical to incorporate these conventional delay lines into an integrated circuit irrespective of the technology used to fabricate the circuit.